RF Circuit Designer's Notes

Little nuggets of RF/analog circuit theory and design. Learn with me about PLLs, Q, noise, oscillators, filters, digital receiver concepts, etc.

Friday, November 17, 2006

Varactor Q

These are notes from a cubicle discussion about choosing a varactor for a VCO.

At low RF frequencies, the varactor can be modeled as a capacitor in parallel with a resistor. Q=Rp/Xc = Rp*2*PI*f*C

Varactor Q varies with the reverse bias voltage applied to the PN junction. The larger the reverse bias, the larger the Q. Why does this occur? My coworker said at VR=0 or below 1V, the depletion region is narrower and thus there is more leakage current. This implies the resistance between the reverse biased PN junction is finite.



Choose a varactor so that VR>=1.5V to 2V at the maximum needed capacitance.

Maximize the difference in voltage between Cmin and Cmax. This reduces tuning sensitivity, which is good for phase noise, and keeps the varactor Q high.


My homework:
What is the behavior of the reverse leakage current vs. VR? I thought leakage current slowly increased until junction breakdown.

What does the equivalent Rp represent besides ohmic losses and leakage currents?

Does increasing VR decrease Cj?

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