RF Circuit Designer's Notes

Little nuggets of RF/analog circuit theory and design. Learn with me about PLLs, Q, noise, oscillators, filters, digital receiver concepts, etc.

Thursday, November 02, 2006

Op-Amp Input Bias Current and Offset Current

I don't often design op-amp circuits and always need to remind myself of what are the non-ideal behaviors of real op-amps. Knowing about these characteristics is important especially if you are designing precision circuits for using in measurements and low signal levels.

1. Input Bias Current

Real op amps sink or source current through their input terminals. The input stage of all op amps is a differential pair made from either BJTs or FETs. The current arises from BJT's base current or the FET's gate leakage current. The FET's gate current is much less than the BJT's base current. The input current is also DIFFERENT between the + and - inputs due to slight mismatches between the transistors used in the differential pair.

IP = input bias current for + input
IN = input bias current for - input

On the spec sheet, the input bias current (IB) is the average of IP and IN. The difference between IP and IN is the input offset current (IOS).

How can IB and IOS cause problems?

If the resistances seen by the + and - terminals are different, then IB will generate a differential voltage across the input and this gets amplified. This can be alleviated by making the resistances identical. Even if the resistances are equal between the + and - terminals, IOS will still produce a differential voltage across the input. The only way to reduce its effects is to use lower values of resistors and use an op-amp with lower IOS.

Temperature effects:

IB decreases as temperature increases for a BJT input stage. Beta rises with temperature.

IB increases as T increases for FET input stage due to the reverse bias current doubling for every 10 degree C rise.

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